EE382 Processor Design

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Table of Contents

EE382 Processor Design

Topics

Baseline Processor Model

Pentium Processor Floorplan

Methodology

Cost

Wafers and Chips

PPT Slide

PPT Slide

PPT Slide

Using Yield to size a die

Other Effects

target yields

Semiconductor Technology Roadmap

What can be put on the die?

smallest device is 5 ? x 5 ?

register bit as an area unit

Register File

Area Units: rbe and A

area of other cells

Floorplan and Area Allocation

Cache Area

Cache Access time

Cache access time

CacheOpt

Area for an integer core

Area for Floating Point Unit

FUPA

other considerations

Cache

Area Optimization

Future Directions

Summary

Microprocessor Generations

Author: Flynn

Email: gere@stanford.edu

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