EE382 Processor Design

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Table of Contents

EE382 Processor Design

Topics

Clock Parameters

Latch Types

Clock Overhead

Reliable Clocking

Multiphase Clock

Latching Summary

Skew

Clocking Summary

Optimum Pipelining

Optimum Pipelining

PPT Slide

Optimum Pipelining

Finding Sopt

Quantization and Other Considerations

Quantization

Microprocessor Design Practice (Part I)

Microprocessor Design Practice (Part II)

Advanced techniques

Self-Timed Circuits

Self-Timed Pipeline

Evaluation process

Self-Timed Circuit Summary

Multi-Phase Domino Clock Techniques

Domino Logic AND Gate

4-Phase Overlapped Clock

Wave Pipelining

Wave Pipelining

PPT Slide

PPT Slide

PPT Slide

Example

Wave and Optimum Pipelining

Limits on Wave Pipelining

Summary

Author: Don Alpert based on Mike Flynn

Email: gere@stanford.edu

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