EE382 Processor Design

2/26/99


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Table of Contents

EE382 Processor Design

Illinois

Write-invalidate

Synchronization/coherency

Consistency of memory ops

Weak consistency

Outline

Scalable MP

Coherency for Scalable MP

Central Directory

Central Directory

Distributed Directory (Part I)

Distributed Directory (Part II)

Distributed Directory (Part II)

Interconnect Networks

Interconnect Networks

Static, Direct Networks

Static, Direct Networks

Links (Channels) and Nodes

Links (Channels) and Nodes

Communication Latency for Static Network

Dynamic, Indirect Networks

Dynamic, Indirect Networks

Baseline Dynamic Network

Baseline Dynamic Network

Other Dynamic Networks

Other Dynamic Networks

Network Tradeoffs

Network Tradeoffs

Dynamic Network Analysis

Dynamic Network Analysis

Static Network Analysis

Static Network Analysis

Static vs. Dynamic Network Example

Bisection Width

Hotspots and Combining

Multiprocessing Summary

Email: gere@stanford.edu

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